1. Field of the Invention
The present invention relates to interface circuits, and more particularly to Input/Output (I/O) circuits and receivers, and even more particularly to high speed, low voltage, low power, differential input, low jitter and skew I/O receiver circuits (LVDR), with a single ended output signal.
2. Background Information
Low voltage differential signals are common for high speed signal transmission. Saturation effects are avoided and power dissipation is limited, and, since low voltage signals are prone to noise, use of differential signals, where the noise is common to both signals, generally overcomes this problem.
However, since common mode signals will occur, LVDR circuits are designed to accept differential signals that ride on a common mode level that may range from the low power, or ground, rail to the Vcc power rail.
U.S. Pat. Nos. 5,801,564; 6,252,432 B1 and 6,236,269 B1 set out a high speed circuits that operate over a wide input common mode range where each has a differential input and a single ended output. In these patents the differential input signals connect to gates of both an NMOS and a PMOS transistor pair connected source to source, where the NMOS pair handle common mode voltages up to within about 200 millivolts of the high power rail and the PMOS pair down to within about 200 millivolts of the ground. A to second stage converts the differential input to a rail to rail single output signal suitable for driving CMOS inverters. This large output signal dynamic range requires a high gain second stage that reduces the frequency response. Moreover, the combined effect of input signal common mode level on the second stage, and second stage wide dynamic output range, limits practical circuits to higher Vcc levels. Also, when the common mode is input voltage and the second stage output voltage change from the ground rail to the Vcc rail, the cross over (switching point) point for the circuit changes since the currents, the gain, and the impedances all change. This crossover point change increases jitter. If the currents were unchanged over the range of input signal common mode voltage swing, the gains would be about constant thereby reducing jitter over that range of input common mode levels.
There is a need for a differential low voltage receiver with a wide input signal common mode range that reduces power dissipation, skew and jitter, and that operates at lower Vcc levels but maintains high speed (high frequency) operation.
It will be appreciated by those skilled in the art that although the following Detailed Description will proceed with reference being made to illustrative embodiments, the drawings, and methods of use, the present invention is not intended to be limited to these embodiments and methods of use. Rather, the present invention is of broad scope and is intended to be defmed as only set forth in the accompanying claims.